Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!voder!pyramid!prls!mips!mash
From: mash@mips.COM (John Mashey)
Newsgroups: comp.arch
Subject: Re: Workstations for Lisp
Message-ID: <21525@winchester.mips.COM>
Date: 13 Jun 89 05:53:22 GMT
References: <486@unipas.fmi.uni-passau.de> <5187@pt.cs.cmu.edu> <EYYf=ky00jcqNYcW4L@cs.cmu.edu> <109577@sun.Eng.Sun.COM>
Reply-To: mash@mips.COM (John Mashey)
Organization: MIPS Computer Systems, Inc.
Lines: 20

In article <109577@sun.Eng.Sun.COM> khb@sun.UUCP (chiba) writes:

>After IO, the next performance "feature" of AI codes is probably
>memory subsystem speed. The current MIPS vs. SPARC implementation key
>difference is cycles for ld/sto ... MIPS is faster; but this results
>in many stalls on the 3100 (vs. say, the MIPS M2000 with its 4-deep
>buffered write thru cache) ... the SS330 has enough buffering that
>stores tend not to lock up ... as best I can remember, the DS3100 has
>write thru, no buffering ... so loads should be faster, stores slower.

Most R2000 or R3000 systems, DS3100 included, use 4-deep write-buffers,
often built with R2020 Write Buffers.
Unless I misread the Sun info (which I don't have handy), both SS1 and
SS330 use write-thru caches with a 1-deep write buffer: please correct
if this is wrong.
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
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