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From: mdeale@mira.acs.calpoly.edu (Myron Deale)
Newsgroups: comp.arch
Subject: Re: FPU chip set
Message-ID: <12111@polyslo.CalPoly.EDU>
Date: 20 Jun 89 05:20:04 GMT
References: <871@stag.UUCP>
Sender: news@polyslo.CalPoly.EDU
Reply-To: mdeale@mira.acs.calpoly.edu.UUCP (Myron Deale)
Organization: ACS, Cal Poly, San Luis
Lines: 37

In article <871@stag.UUCP> trb@stag.UUCP ( Todd Burkey ) writes:
>I am looking for information on a FPU chip set from a company I think
>is called BIT. It is rated at 50MFLOP, is hopefully 32 bit, and I think
>it is ECL based. Any information would be appreciated, including pricing,
>specs, and availability. Also, I would be interested in hearing if that
>50MFLOP rating is peak or effective w/load and store of data to memory.
>  Thanks,
>  -Todd Burkey
>   pwcs!stag!trb


Hello,
   Bipolar Integrated Technology, Inc. (BIT) located in Beaverton, OR,
makes the B3110/B3120 (ECL, there's also a TTL version) Floating
Point Chip Set (the "preliminary" data sheets say Sept/87). Peak perfor-
mances are listed as: "22 MFLOPS double precision multiply data rate,
40 MFLOPS double precision ALU data rate, 100 MIPS integer data rate."

   More recently, they have announced (EDN news, EE Times, etc.) the
first ECL implementation of Sun's SPARC. The "integer unit operates at
80 MHz and provides 65 MIPS (average CPI of 1.2). The integer unit and
its associatd floating-point subsystem together offer 14M-FLOPS perfor-
mance." (double-precision Linpack). [EDN news, 6/15/89, p.14] The five
other chips that comprise the fp subsytem supposedly use upgraded
B3110/20 chips.

   It's a bit pricy, but what do you expect, it's ECL.

   Reads like a good implementation of SPARC has shown up. One thing I am
troubled by is the cache memory set-up. I am completely un-bothered by
the need for a second-level cache. However, I am worried that the
primary level (closest to the CPU) has its architecture pre-defined by
the chip builders, ie. I don't get to tweak the design of the cache (if
I ever decide to work with this stuff). "Say it isn't so."

Myron
// mdeale@cosmos.acs.calpoly.edu