Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!apple!usc!ucla-cs!frazier
From: frazier@oahu.cs.ucla.edu (Greg Frazier)
Newsgroups: comp.arch
Subject: Re: Caches
Message-ID: <25114@shemp.CS.UCLA.EDU>
Date: 21 Jun 89 19:53:22 GMT
References: <799@acorn.co.uk> <95@altos86.Altos.COM> <41770@bbn.COM>
Sender: news@CS.UCLA.EDU
Reply-To: frazier@cs.ucla.edu (Greg Frazier)
Organization: UCLA Computer Science Department
Lines: 21

In article <41770@bbn.COM> slackey@BBN.COM (Stan Lackey) writes:
>Looking at the RISC trend, it seems natural to assume that the next
>step is to have a writeback cache with no "snooping" (as it has been
>called) for either I/O reads OR writes, and solve the problem in
>software.
>
>-Stan

I really don't want to start a "I know what RISC _really_ is"
sort of argument, but the RISC philosophy would only put the
cache consistancy functions in software if that made the system
faster.  The basic idea of RISC is hardware minimization -> speed,
not hardware minimization for the sake of minimization.  Since
one of the keys to high-speed computing is keeping the memory
"close" to the processor, I doubt moving the caching functions
to software would ever be a win.
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