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From: bs@linus.UUCP (Robert D. Silverman)
Newsgroups: comp.arch,misc.wanted,comp.sources.wanted
Subject: MIPS Assembler Procedure
Message-ID: <57125@linus.UUCP>
Date: 21 Jun 89 15:32:25 GMT
Reply-To: bs@gauss.UUCP (Robert D. Silverman)
Organization: The MITRE Corporation, Bedford MA
Lines: 25


The MIPS processor has a multiply instruction which will produce a double
length product from two 32 bit words, storing the result in the special
LO and HI registers.

However, there is no instruction that will divide that double length
product by a 32 bit word, giving a 32 bit quotient and/or remainder.

One can, of couse, program a nitty gritty double precision divide routine.

However, I don't know the MIPS assembler well enough to be confident that 
I would write an efficient routine.

Does anyone have a routine that will take a double length product out
of the LO/HI register pair and divide it by a 32 bit (unsigned) integer,
yielding a quotient and/or remainder?

This, in my opinion is one of the major faults of RISC processors. They
do not provide basic arithmetic instructions. 

Note that the above operation is trivial on many microprocessors. I have
routines which do it well for the 68020/68030, 80286/80386, NSC 320000,
VAX, etc.

Bob Silverman