Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!mcvax!hp4nl!philapd!ssp1!roelof From: roelof@idca.tds.PHILIPS.nl (R. Vuurboom) Newsgroups: comp.arch Subject: Re: 80186 Interrupts: Am I missing something? Summary: No. Keywords: 80186, Interrupts, Edge-Trigger, Blast, Pow, Sock, Wham. Message-ID: <139@ssp1.idca.tds.philips.nl> Date: 28 Jun 89 08:05:44 GMT References: <258@hades.OZ> Organization: Philips Telecommunication and Data Systems, The Netherlands Lines: 40 Electronic mail fail so posting: In article <258@hades.OZ> you write: > > I have a nasty little problem with an 80186 system I'm working on at >the moment; basically the problem is to do with missing interrupts. The Conceptually, either somebody knocks on your door (interrupt) or you knock on theirs (polling). I don't see any other option (but will be happy to be proven wrong). If you can go out and read some sort of register, memory location whatever which is set by the interrupting device you're off the hook. The flag which is set means "Hey, I generated an interrupt and want to be serviced". What you then do is in the interrupt routine (you really only need one) poll each of the flags. Atomic test and clear the flag (if you can) and carry out any required actions. This method is robust against (occasional) lost interrupts and double interrupts for the same service request or interrupts coming in at different levels. > > Or is there something I've missed?. Not really except perhaps an occasional interrupt :-) On the other hand if you can't do the above then you can forget about getting... > > back to slandering some Intel RISC > based DMA cray 68000 optimisation VAX mainframe front-ends..... Cause then you've got real problems :-) -- Roelof Vuurboom SSP/V3 Philips TDS Apeldoorn, The Netherlands +31 55 432226 domain: roelof@idca.tds.philips.nl uucp: ...!mcvax!philapd!roelof -- Roelof Vuurboom SSP/V3 Philips TDS Apeldoorn, The Netherlands +31 55 432226 domain: roelof@idca.tds.philips.nl uucp: ...!mcvax!philapd!roelof