Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ncar!boulder!unicads!les
From: les@unicads.UUCP (Les Milash)
Newsgroups: comp.arch
Subject: Re: What is a Mainframe?
Message-ID: <522@unicads.UUCP>
Date: 29 Jun 89 02:07:12 GMT
References: <64991@yale-celray.yale.UUCP>
Reply-To: les@unicads.UUCP (Les Milash)
Distribution: comp.arch
Organization: Unicad  Boulder, CO
Lines: 21

In article <64991@yale-celray.yale.UUCP> leichter@CS.YALE.EDU (Jerry Leichter) writes:
>In article <518@unicads.UUCP>, les@unicads.UUCP (Les Milash) writes...
>>>If it's design/architecture dates to the late eighties its a RISC
>which should not be taken to mean that it has a reduced instruction set
>but just that "RISC" was the "buzzword of the year"

kind of my point.  as i recall this group could never agree what RISC even
meant, somewhere between hardwired logic, exposing innards to the compiler,
etc... but then all that real estate was used for windows, registers,
scoreboards, graphics junk, etc...

i kinda decided in my mind that RISC meant Radical Instruction Set Computer
and CISC meant Conservative Instruction Set Computer.  these terms are
relative to the current trends&thinking.  if in 10 yrs Caltech and Stanford
are making faster chips easier paging microcode, nanocode, picocode, and fempto
code off an optical disk, that'll be Radical, and if it's faster it'll be
a good thing generally.

for now tho let's quit defining sh*t and talk about how to build faster sh*t.

nitey nite.