Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!mcvax!hp4nl!philapd!ssp1!roelof
From: roelof@idca.tds.PHILIPS.nl (R. Vuurboom)
Newsgroups: comp.arch
Subject: Re: HOT CHIPS conference
Message-ID: <142@ssp1.idca.tds.philips.nl>
Date: 29 Jun 89 12:16:32 GMT
References: <596@megatek.UUCP> <112807@sun.Eng.Sun.COM>
Organization: Philips Telecommunication and Data Systems, The Netherlands
Lines: 23

In article <112807@sun.Eng.Sun.COM> khb@sun.UUCP (Keith Bierman - SPD Languages Marketing -- MTS) writes:

>At yesterday's IEEE HOT CHIPS conference, we were treated to three
>papers about dedicated SPARC FPU's in addition to the papers focused
>on FPU's BIT is already sampling ECL SPARC chips. So the FPU
>TMS390C602, LSI 64814 to name just 3).
>
>PRIMSA delievered a system level paper about their 250 MIPS (native,
>say 100vaxmips) 100Mflop SPARC machine. 



Anybody care to tell us poor folks who couldn't attend more about
the pearls and gems of wisdom that were delivered at the conference?






-- 
Roelof Vuurboom  SSP/V3   Philips TDS Apeldoorn, The Netherlands   +31 55 432226
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