Path: utzoo!attcan!uunet!dino!sharkey!mailrus!tut.cis.ohio-state.edu!ucbvax!hplabs!hplabsz!kjchang
From: kjchang@hplabsz.HPL.HP.COM (K. J. Chang)
Newsgroups: comp.arch
Subject: MIPS, SPARK, RISC, and CISC
Message-ID: <3536@hplabsz.HPL.HP.COM>
Date: 28 Jun 89 16:38:45 GMT
Reply-To: kjchang@hplabsz.UUCP (Jeng Chang)
Organization: Hewlett-Packard Laboratories
Lines: 20
References:

I have a couple of questions and I hope someone can enlighten me:

1. when someone says MIPS architecture, does he mean a special kind
	of chip architecture or he is from a company called MIPS and
	he simply wants to sell its products. I know MIPS also stands 
	for million instructions per sec.
2. SPARK. What is its definition? Where can I found good references?
	Is it related to RISC?
3. RISC. I knew this was a berkeley stuff. Does Stanford have a similar
	stuff?
4. CISC. What is its fate? Can I get some good articles on this topic
	which are not written by berkeley's risc group |-)?


Thanks for your attention,

-Chang

e-mail: kjchang@hplkjc.hpl.hp.com or
        kjchang@hplabsz.hpl.hp.com