Path: utzoo!attcan!uunet!cs.utexas.edu!usc!apple!amdahl!tetons!bb
From: bb@tetons.UUCP (Bob Blau)
Newsgroups: comp.arch
Subject: Re: MIPS Assembler Procedure
Summary: some 370 Divide numbers ...
Message-ID: <812@tetons.UUCP>
Date: 30 Jun 89 00:02:45 GMT
References: <57125@linus.UUCP> <1989Jun24.230056.27774@utzoo.uucp> <22218@winchester.mips.COM>
Organization: Amdahl Corp., Rexburg, ID
Lines: 46

In article <22218@winchester.mips.COM>, mash@mips.COM (John Mashey) writes:
>In article <1989Jun24.230056.27774@utzoo.uucp> Henry Spencer writes:
>>When the list of "basic" arithmetic instructions is pages long, one starts
>>to wonder how many of them are really "basic".  The instruction you ask
>>for -- divide double length by single length yielding single-length result -
>>is not exactly frequently needed.  Just how much silicon is it worth to make
>>it run faster than an implementation as a subroutine?
> 
> Actually, for many languages, on 32-bit machines, use of 32-bit
> divisor and 64-bit dividend is often worse than useless, especially
> if it's the only one you have.  For example, consider S/360 & followons:
> 	1) The divisor is 64-bits, and must occupy an even-odd register
> 	pair.
> 	2) The divide leaves remainder in the even and quotient in the odd.
>   ...
> 	you probably end up generating usage of a scratch register pair:
> 	LR	RTEMP,R
> 	SRDA	RTEMP,32
> 	DR	RTEMP,divisor
> 	LR	result,RTEMP
>   ...
> 5) Now, none of this is a terrible deal, as divides aren't that frequent,

I dug up some ancient (10 year old) instruction mix statistics from my
bookshelf which back up the observation that integer divides aren't too
common in the 370 environment.  I didn't look at actual compiler output to see
the relationship between DR and SRDA, but it seems that the FORTRAN compiler
used the D instruction (with the dividend in memory) more often than DR.
This makes sense, since a memory access out of cache can be considerably
faster than a double word arithmetic shift right (SRDA). Note that even
two Load Registers (LR's) and a single word arithmetic shift right (SRA)
can be faster than an SRDA depending on the implementation.

These numbers are the mean instruction frequency out of traces of over
15,000,000 instructions.
                            DR        SRDA          D
Commercial COBOL Mix      .00003     .00007      .00000 
Scientific FORTRAN Mix    .00016     .00115      .00071

				           -Bob

(Std. disclaimers apply)
-- 
  Bob Blau       Amdahl Corporation    143 N. 2 E., Rexburg, Idaho 83440
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