Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!rutgers!usc!orion.cf.uci.edu!uci-ics!zardoz!peregrine!ccicpg!paulm
From: paulm@ccicpg.UUCP (tmp Paul Moreau usenet acct)
Newsgroups: comp.sys.tandy
Subject: Re: Model 4 ref manual
Summary: A possible fix
Message-ID: <29472@ccicpg.UUCP>
Date: 28 Jun 89 20:39:45 GMT
References: <2520@csd4.milw.wisc.edu> <25842@ccicpg.UUCP> <9014@xanth.cs.odu.edu> <108@konkord.UUCP>
Distribution: na
Organization: Computer Consoles Inc. (CPD), Irvine, CA.
Lines: 67

In article <108@konkord.UUCP>, jar@konkord.UUCP (jar) writes:
> 
> 	I've recently gotten my hands on a tandy model 4. One problem, turn
> the thing on and all you get on the screen are 80 X 24 @'s, and the machine
> does nothing but sit there. 
>   [......

    Sorry to post this to the net but I haven't been able to get a hold
    of John using the mailer ....

    Hi John,
    I was just thinking of the problem that you're having with the
    TRS-80 Model 4.  Before I went into Diagnostic Software, I was
    A hardware Engineer.  From my experience with computers, my
    guess is that when you first power the system up it does the following:

	Clears ram by writing 00's to all locations (including screen ram)
	relocates the ROM to Ram.
	Swaps memory (turn off shadow ram).
	goes to town.

   Well you said that the screen is full of @'s.  It would take the
   processor to write that.  My guess is that you might have a data
   bit (bit 6) stuck high because of a short or a bad data buffer and
   instead of writting 0x00's, it's writing 0x40's (a @ character).
   After clearing ram it probably relocates the ROM into ram and jumps
   to Ram.  If bit 6 is stuck High, then all the code is bad, hence crash.
   OK, now I'm looking at my schematics , lets see ....
   On a Rev.A-D board, U71 (74LS245) is the Data buffer tranceiver.
   All data EXCEPT ROM is passed through this chip.  

                          U71
     (CPU side)     A              B     (LOGIC side)
                         _____
                 D0----4|  7  |16----D0
                 D1----6|  4  |14----D1
                 D2----8|  L  |12----D2
                 D3----9|  S  |11----D3
                 D4----7|  2  |13----D4
                 D5----5|  4  |15----D5
                 D6----3|  5  |17----D6 <-- check this puppy
                 D7----2|__   |18----D7
                        |EN DR|
                         ----- 
			 19  1
                          |  | 
                          |  |

   The DR (direction) pin is high for a CPU WRITE to RAM, low for a READ.
   The Gate Array board has this same chip as U28 but the pinouts are
   different.  CPU side d0-d7 are 2,3,4,5,6,7,8,9  Logic side are
   18,17,16,15,14,13,12,11

   Hope this helps, it make sence to me that this is probably it.

   ----

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