Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!sun-barr!ames!hc!lanl!jlg
From: jlg@lanl.gov (Jim Giles)
Newsgroups: comp.arch
Subject: Compiling - RISC vs. CISC
Message-ID: <13976@lanl.gov>
Date: 7 Jul 89 23:23:26 GMT
Organization: Los Alamos National Laboratory
Lines: 39

Every once in a while, someone in this newsgroup makes the claim
that RISC trades off hardware complexity for compiler complexity.
This is simply _NOT_ true.  It is always _easier_ to write a compiler
for a RISC machine than for a CISC machine.

Compiling is generally divided into two parts.  This "front end"
parses the input language and determines whether the program is
syntactically and semantically correct.  The "front end" then
passes the program along in some intermediate form.  The "back
end" selects instructions which implement the original program,
allocates registers (and other temporary resources), and outputs
the code.  Some compilers combine the "front" and "back end" parts,
or divide labor in more unusual ways, but this does not effect the
validity of the following argument.

The "front end" processing of a compiler is identical whether the
target machine is a RISC or a CISC.  So, no trade-off of complexity
can occur there.

For a RISC machine, the only hard part of the "back end" is register
allocation.  Instruction selection is fairly simple since there is
generally only one way the perform each intermediate code operation.
On a pipelined machine, code ordering comes into play (at least if
you want optimized code).  This compilcates matters, since a different
code ordering makes different register allocation constraints.
For this reason, optimizing can be difficult, even on a RISC machine.

On a CISC machine, instruction selection can be a real problem.  This
is because there are generally several instruction sequences possible
to implement each operation.  Instruction selection obviously
effects the register allocation phase (and the code ordering phase).  
To make matters worse, instruction selection is context sensitive.
This means that different code ordering during optimization could
invalidate the instruction selection choice (or, at least make the
selected instructions sub-optimal).

There may indeed be a trade off between RISC and CISC.  But this
trade off is certainly _not_ in the complexity of the compiler.
In fact, as shown above, the circumstance is quite the opposite.