Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!bionet!ames!hc!lanl!jlg
From: jlg@lanl.gov (Jim Giles)
Newsgroups: comp.arch
Subject: Re: Compiling - RISC vs. CISC
Message-ID: <13979@lanl.gov>
Date: 11 Jul 89 05:23:08 GMT
References: <25547@shemp.CS.UCLA.EDU>
Organization: Los Alamos National Laboratory
Lines: 20

From article <25547@shemp.CS.UCLA.EDU>, by frazier@oahu.cs.ucla.edu (Greg Frazier):
> [...]
> Actually, I believe you are wrong, Jim.  While code selection
> is easier on a RISC, CISC compilers tend to avoid this by only
> using the simple compilers. 

In this case, you are eliminating the supposed advantage to CISC
machines - their richer instruction set.  If you don't use a fairly
sophisticated instruction selection algorithm, your instruction
selection will almost always be long short of optimal.

> [...]             Finally, as you pointed out, RISCs require
> sophisticated register allocation.

So do CISCs!!  To be sure, CISCs tend to be less reliant upon
registers.  But they also tend to have _fewer_ registers - so
register spilling occurs as often as on RISCs.  CISCs require
ALL the optimization steps (for the same performance) as RISCs,
PLUS the extra complexity of instruction selection (which feeds
back into the other optimization steps).