Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!gatech!uflorida!rex!ukma!xanth!ames!vsi1!wyse!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Compiling - RISC vs. CISC Message-ID: <23378@winchester.mips.COM> Date: 15 Jul 89 14:20:50 GMT References: <13976@lanl.gov> <199@dg.dg.com> <28471@ames.arc.nasa.gov> Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 30 In article <28471@ames.arc.nasa.gov> lamaster@ames.arc.nasa.gov (Hugh LaMaster) writes: >In article <199@dg.dg.com> uunet!dg!rec (Robert Cousins) writes: >>of compute power. On the 88K, we need less than 1 MIPS to generate >>a Dhrystone MIPS. In other words, we get Dhrystone MIPS > CPU >>clock speed. When this first happened here, many people were > >Could you clarify what you mean? I know of no correlation between >"Dhrystones/second" and "Instructions issued/second". > >Also, on a lot of machines, the Dhrystone rating is quite a bit higher >than a simple "MIPS"/"VAX MIPS" ratio would indicate, thus demonstrating >that Dhrystone is but one of many benchmarks, and the 11/780 does better >on others... Yes, 100% [I'm on the road with little bandwidth, but I just can't pass this one up...] 1) Even with no gimmickry, Dhrystone is the benchmark of choice for showing how much better than a VAX you are, because Dhrystone has a lower-than usual number of cycles / subroutine call, i.e., it seriously penalizes anything with a slow function call sequence. This data has been published for years..... 2) With the current level of compiler gimmickry, you must obey HrDr Weicker"s advice about disbelieving anything unless you see the generated code. What does any of this mean when you can change the numbers +40% based on a single optimization of a single statement??? -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086