Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!iuvax!cica!tut.cis.ohio-state.edu!ucbvax!pucc.Princeton.EDU!wagner
From: wagner@pucc.Princeton.EDU (John Wagner)
Newsgroups: comp.lang.asm370
Subject: Re: NUCLEUS
Message-ID: <8907121952.AA07469@jade.berkeley.edu>
Date: 12 Jul 89 16:02:02 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Reply-To: IBM 370 Assembly Programming Discussion List <ASM370%UCF1VM.bitnet@jade.berkeley.edu>
Distribution: inet
Organization: The Internet
Lines: 19

In article <8907112107.AA23647@jade.berkeley.edu>, U23379@UICVM.BITNET (Henry
        Young 312-413-3626) writes:>
> Sorry, I discovered the source of the problem.  When issuing an SVC 202
> with a address specified for error handling i.e. DC AL4(CMDERR)
> the address does not get changed to reflect the new location in the
> nucleus since there is no way to include the base register for addressing.
> I guess I will just have to check R15 directly.  After all the 'PER'ing
> today, I might as well become a cat. ;)

To avoid this problem always code the error address ad DC AL4(1).  This
will cause CMS to always continue at the instruction following the error
        address.  The code sequence would look like this:


        SVC  202       Doing whatever you were doing
        DC   AL4(1)    Always return (even on failure)
        LTR  R15,R15   Did it work?
        BNZ  FAILURE   ---> Nope
        ...