Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!sun-barr!cs.utexas.edu!uunet!crdgw1!news
From: news@crdgw1.crd.ge.com (USENET News System)
Newsgroups: comp.sys.ibm.pc
Subject: Re: HELP! Interrupts on COM ports
Keywords: COM port, Interrupt, Device Driver
Message-ID: <1240@crdgw1.crd.ge.com>
Date: 18 Jul 89 13:21:26 GMT
References: <1137@rwthinf.UUCP>
Reply-To: dixon@sagittarius.crd.ge.com (walt dixon)
Organization: General Electric Corp. R&D, Schenectady, NY
Lines: 30

If the receiver side uses interrupts and the transmitter side uses polling,
everything is OK.
If the transmitter uses interrupts also, the following problem occurs:
From: dixon@sagittarius.crd.ge.com (walt dixon)
Path: sagittarius!dixon

>When the transmitter and the receiver interrupts occur simultaneously, then
>sometimes the transmitter interrupt is lost: The IIR register of the
>8250 does not report "Transmitter empty interrupt" after the
>"Receiver data available interrupt" has been processed.
>Both (8250 internal) interrupts should occur during the same hardware
>interrupt cycle of the 8259.
>After this situation, the LSR of the 8250 correctly reports
>"transmitter ready" (bit 5).
>
>Is that a problem with the edge-sensitive mode of the 8259?

This is a common mistake in dealing with the 8250.  The documentation
is not particularly clear,  so one must read between the lines.  Your
interrupt service routine must loop on the interrupt pending bit.  So
long as this bit is clear,  read the IIR and determine the interrupt source.
When the bit goes high,  send an EOI to the 8259 to clear the interrupt.

Walt Dixon		{arpa:		dixon@crd.ge.com	}
			{us mail:	ge crd			}
			{		po box 8		}
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Walt Dixon dixon@crd.ge.com