Path: utzoo!attcan!uunet!mcvax!hp4nl!maestro!hanst
From: hanst@maestro.htsa.aha.nl (Hans Trompert)
Newsgroups: comp.sys.sequent
Subject: Re: hard checking
Keywords: Sequent, CPU cache
Message-ID: <993@maestro.htsa.aha.nl>
Date: 10 Jul 89 16:00:09 GMT
References: <1354@irisa.irisa.fr>
Reply-To: hanst@htsa.UUCP (Hans Trompert)
Organization: AHA-TMF (Technical Institute), Amsterdam The Netherlands
Lines: 17

In article <1354@irisa.irisa.fr> badouel@irisa.irisa.fr (Didier Badouel) writes:
->Does anyone know if it's possible and how to check the CPU caches 
->of the Sequent Balance ?
->I will appreciate any information to measure several statistics 
->like the ratio of cache default, number of bus access conflicts ... etc.
If someone does have some tools to messure this, we are interested
as well. We have a Balance with 8 cpu's and 32 tty ports, and
we use our system heavely. We're also interested in any hints or
tips to improve the overall performance.
Greetings,
-- 
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