Xref: utzoo comp.unix.cray:23 sci.physics:9056 comp.lsi:785 Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!wasatch!cs.utexas.edu!uunet!zephyr.ens.tek.com!tekcrl!tekgvs!arnief From: arnief@tekgvs.LABS.TEK.COM (Arnie Frisch) Newsgroups: comp.unix.cray,sci.physics,comp.lsi Subject: Re: GaAs CMOS in Cray-3 ? Summary: Doesn't mean that's what they're using Message-ID: <5661@tekgvs.LABS.TEK.COM> Date: 27 Jul 89 18:12:35 GMT References: <7048@microsoft.UUCP> <24035@obiwan.mips.COM> Followup-To: comp.unit.cray,sci.physics,comp.lsi Organization: Tektronix Inc., Beaverton, Or. Lines: 16 In article <24035@obiwan.mips.COM>, mark@mips.COM (Mark G. Johnson) writes: > I have before me a copy of U.S. Patent number 4,638,188. > > "PHASE MODULATED PULSE LOGIC FOR GALLIUM ARSENIDE" > > The patent describes a circuit family which is constructed of > N-channel depletion-mode MESFETs, schottky diodes, and resistors. Various forms of AC coupled logic have been implemented before, in GaAs and other technologies. I believe some previous work was done in England in GaAs. Just because CRAY has this patent doesn't mean that this is the methodology of the CRAY 3. Arnold Frisch Tektronix Laboratories