Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!sun-barr!newstop!sun!quintus!pds
From: pds@quintus.UUCP (Peter Schachte)
Newsgroups: comp.sys.amiga
Subject: Re: Stack
Message-ID: <1220@quintus.UUCP>
Date: 26 Jul 89 21:16:19 GMT
References: <2105@hub.UUCP> <12238@grebyn.com>
Reply-To: pds@quintus.UUCP (Peter Schachte)
Organization: Quintus Computer Systems, Inc.
Lines: 18

In article <12238@grebyn.com> ckp@grebyn.UUCP (Checkpoint Technologies) writes:
>In article <2105@hub.UUCP> dougp@voodoo.ucsb.edu writes:
>>
>>	Is there any particular reasor that no microprocessor has limit
>>registors for the stack?

The DEC10 does better.  On the DEC10, registers are 36 bits wide,
divided into two 18 bit half-words.  Each half word is big enough to
hold an address (256K WORD address space, kind of small).  So a stack
pointer on holds the top of stack address in one half word, and the
stack space remaining in the other half word.  PUSH increments one half
and decrements the other, signaling an exception if it hits 0.  Very
nice.

-- 
-Peter Schachte
pds@quintus.uucp
...!sun!quintus!pds