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From: arnief@tekgvs.LABS.TEK.COM (Arnie Frisch)
Newsgroups: comp.unix.cray
Subject: Re: GaAs CMOS in Cray-3 ?
Summary: Enhancement/Depletion
Keywords: Cray-3, GaAs, LSI, CMOS, hole mobility
Message-ID: <5643@tekgvs.LABS.TEK.COM>
Date: 25 Jul 89 20:07:20 GMT
References: <7048@microsoft.UUCP> <3892@portia.Stanford.EDU>
Distribution: usa
Organization: Tektronix Inc., Beaverton, Or.
Lines: 13

In article <3892@portia.Stanford.EDU>, brooks@portia.Stanford.EDU (Michael Brooks) writes:
> 
> As regards the Cray-3 GaAs devices:

I believe the answer is the use of an enhancement/depletion process,
where the pull-down devices are enhancement (positive thresh-hold
voltage) and the pull-up devices are depletion (negative thresh-hold
voltage) - both N channel.  This gives a very simple intergate voltage
level shifter - namely, none.  This process has only become recently
practical because of the thresh-hold voltage control necessary.

Arnold Frisch
Tektronix Laboratories