Path: utzoo!utgpu!watmath!att!pacbell!ames!mailrus!csd4.milw.wisc.edu!cs.utexas.edu!uunet!mcvax!ukc!acorn!moncam!paul From: paul@moncam.co.uk (Paul Hudson) Newsgroups: comp.arch Subject: Re: delayed branch (time to plug the ARM again ...;-) Message-ID: Date: 7 Aug 89 09:35:47 GMT References: <2246@taux01.UUCP> <1462@l.cc.purdue.edu> <26139@shemp.CS.UCLA.EDU> <7543@cbmvax.UUCP> Sender: paul@moncam.co.uk Organization: Monotype ADG, Cambridge, UK. Lines: 25 In-reply-to: jesup@cbmvax.UUCP's message of 4 Aug 89 19:14:51 GMT For some reason known only to the designers, the ARM doesnt have a delayed branch slot (blowing away the pipeline instead). What it does have is conditional execution of every instruction. This means that many (conditional) branches can be replaced by conditionally executing the next few instructions instead, thus side-stepping the scheduling problem.. Since also you can choose whether an arithmetic instruction affects the condition codes, it's easy to arrange (usually in a peepholing pass). IMHO, they should have had a delay slot too, though. The ARM instruction set is one of the nicest to deal with, both for hand-coding and compiler writing - well worth a look. -- Paul Hudson These opinions void where prohibited by law. Until 23 August (but mail will be forwarded for a while) MAIL: Monotype ADG, Science Park, Cambridge, CB4 4FQ, UK. PHONE: +44 (223) 420018 EMAIL: paul@moncam.co.uk, FAX: +44 (223) 420911 ...!ukc!acorn!moncam!paul On vacation until September 6, then EMAIL: ..!mcvax!i2unix!iconet!trzdor1!paul, paul@trzdor1.ico.olivetti.com