Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!mcf!mibte!gamma!thumper!ulysses!andante!alice!ark
From: ark@alice.UUCP (Andrew Koenig)
Newsgroups: comp.lang.c
Subject: Re: IEEE floating point format
Message-ID: <9708@alice.UUCP>
Date: 30 Jul 89 13:32:18 GMT
References: <2170002@hpldsla.HP.COM> <9697@alice.UUCP> <26532@amdcad.AMD.COM>
Organization: AT&T Bell Laboratories, Liberty Corner NJ
Lines: 24

In article <26532@amdcad.AMD.COM>, tim@crackle.amd.com (Tim Olson) writes:

> Neither.  Double precision fields are 1 sign, 11 exponent, and 52
> fraction bits.

OK, I've stopped relying on my memory and went and looked at
a paper I wrote about it a few years ago.

You're both right -- in the introductory section of that
paper I said

	An IEEE double precisionf floating point number
	is 64 bits: a sign bit, an 11-bit exponent, and
	a 52-bit fraction ... A single bit, not explicitly
	stored, precedes the binary point; this bit is called
	the hidden bit and its value is determined by that
	of the exponent.

Forgive my dropped neurons; I am quite confident about this
version because I checked it agains the IEEE standard at the
time I wrote it.
-- 
				--Andrew Koenig
				  ark@europa.att.com