Path: utzoo!utgpu!watmath!att!pacbell!ames!bionet!sdsu!usc!bbn!oliveb!amiga!cbmvax!daveh
From: daveh@cbmvax.UUCP (Dave Haynie)
Newsgroups: comp.sys.amiga.tech
Subject: Re: DTACK* or not to DTACK*, that is my question...
Message-ID: <7563@cbmvax.UUCP>
Date: 7 Aug 89 22:26:09 GMT
References: <119697@sun.Eng.Sun.COM>
Organization: Commodore Technology, West Chester, PA
Lines: 59

in article <119697@sun.Eng.Sun.COM>, raz%kilowatt@Sun.COM (Steve -Raz- Berry) says:
> Keywords: hardware hairy hendersons VMA* VPA* DTACK* and their brothers.

> Time for the hardware guys to get a question in sideways...

> IF you are responding to a VPA* signal because the GARY chip decodes a
> periphal address, does this mean that DTACK* is *not* asserted during
> this cycle ??? The 68K manual says it's not, but the GARY chip isn't
> in the 68K manual.

Correct -- DTACK* isn't asserted during VPA*, however, only the 8520s are
supposed to respond using the VPA*/VMA* mechanism.  While these signals are
present on the expansion bus, and an expansion card could be carefully 
designed to fit a device or two in the decoded space unused by the 8520s,
this isn't supported, and is guaranteed to break in a future system.  Thus,
the VPA*/VMA* mechanism is officially a motherboard-only resource.

> Ok, now for the even more advanced students, do the 8520's respond to
> VMA* by issuing an INT6/2* ? And if so can I assume that Paula will
> suck up this interrupt and generate an IPL code that I will have to
> feed to my 68020 ??? 

VMA* and the interrupts are separate concepts.  An 8520, as with most devices
that generate interrupts, will generate an interrupt at any time, at least from
the processor's point of view.  The INT2* and INT6* lines are in fact fed to
Paula, who does synchronize them and priority encode them with any custom chip
based interrupts to generate the appropriate IPL code.  

For a read or write of an 8520, Gary decodes the 8520 addresses and generates 
VPA*, the 8520 chip selects are generated based on either A12 or A13 going low
with VMA*, depending on which 8520 you're talking to.

> Can I assert AUTO* right away when I detect an interrupt ? Or do I have to 
> wait until everybody goes tri-state before I drop AUTO* ???

The autovector signal should be the same for any interrupt.  You can generate
it based on a CPU space decode of an interrupt acknowledge cycle alone if you 
like; it's a cycle terminator, just like DSACKx*, STERM*, or BERR*.  Such a
cycle should not be made visible to the system outside the 68020/30, though in
practice it's not a problem, since it ends up reading ROM space anyway as I
recall.  

> Hmm, I wonder how many people are going to figure out what I am tring
> to build here? ;-)

Well, it sounds like you're interested in the normal way of building a 68020
or 68030 CPU interface for an A2000 type machine; far as I know, everyone
does AVEC in much the same way.  It still doesn't make your 8520 interrupts
fast, since they get vectored to a table that's in Chip memory unless you
use the VPA register, which apparently isn't supported in 1.3, or use some
MMU tricks.

> Steve -Raz- Berry     Disclaimer: It wasn't me! I was volatilizing my esters.
> UUCP: sun!kilowatt!raz                   ARPA: raz%kilowatt.EBay@sun.com
> KILOWATT: sun!kilowatt!archive-server    archive-server%kilowatt.EBay@sun.com
-- 
Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: D-DAVE H     BIX: hazy
           Be careful what you wish for -- you just might get it