Path: utzoo!attcan!uunet!cs.utexas.edu!sun-barr!decwrl!elroy.jpl.nasa.gov!ucla-cs!uci-ics!zardoz!tgate!ka3ovk!teemc!cfctech!pte!kiy From: kiy@pte.UUCP (Kevin Young) Newsgroups: comp.sys.ibm.pc Subject: Re: BIOS Shadowing / Memory usage??? Summary: Less wait states Keywords: bios shadow memory Message-ID: <1633@pte.UUCP> Date: 25 Jul 89 13:13:13 GMT References: <6541@athertn.Atherton.COM> <45900251@uxe.cso.uiuc.edu> <1491@lzfme.att.com> <6687@athertn.Atherton.COM> <1288@crdgw1.crd.ge.co Reply-To: kiy@pte.UUCP (Kevin Young) Distribution: na Organization: Precise Technology & Electronics, Warren, MI Lines: 32 In article <1288@crdgw1.crd.ge.com> stenstro@algol.crd.ge.com (Ross Stenstrom) writes: >So, what IS shadowing anyway... >Ross Stenstrom > stenstro@algol.crd.ge.com (no m!) uunet!crdgw1.ge.com!stenstrom Ross, Shadowing is a technique that increases the effective memory access speed of software sitting in ROM/EPROM by moving it to DRAM and then executing it there. EPROM technology is inherently slower than DRAM technology and typically requires 2 to 3 wait states per access depending on system clock speed whereas DRAM takes 0 to 1 wait states. The shadow RAM itself sits at the same memory location as the BIOS EPROM/ROM and is switched by hardware on the CPU card. The initialization procedure is to first copy the contents of the EPROM to low memory, switch the select bit to enable the shadow DRAM, and then move the copy in low memory back into the shadow DRAM. Finally, the write-enable to the shadow DRAM is disabled, preventing errant programs from erasing its contents. Shadowing is relatively easy to implement in a PC when using 1MB memory chips because the memory needed for shadowing is already available. It is simply hidden behind the BIOS chips by the address decoder. Hope this helps! Kevin -- >|< Kevin I Young uunet!edsews!pte!kiy Precise Technology & Electronics, Inc. Custom Automated Test and Measurement Equipment for Industry Old Saying: "If you can't do it in real time, then don't do it at all" - me