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From: bradb@tekfdi.FDI.TEK.COM (Brad Barmore)
Newsgroups: sci.electronics
Subject: Re: Xilinx
Summary: used 'em before
Message-ID: <3297@tekfdi.FDI.TEK.COM>
Date: 4 Aug 89 18:44:22 GMT
References: <8897@june.cs.washington.edu>
Organization: Tektronix Inc., Beaverton, Or.
Lines: 45

In article <8897@june.cs.washington.edu>, mckenzie@june.cs.washington.edu (Neil McKenzie) writes:
> Hello netlanders.  I'm using the Xilinx Logic Cell Arrays (LCAs)
> and I'm interested in other people's anecdotes, experiences, etc.
> 
> Xilinx also sells a software development system for doing automatic
> placement and routing (APR) of the internal logic blocks.  For small designs,
> it's adequate, but for larger designs, the result can be a slow running
> circuit.  I have heard that many people who want the max speed will
> abandon the APR and just do everything by hand, which can be a very tedious
> process.
> 
> Do you netlanders use competing products (Altera, Actel)?  How do they stack
> up, especially in terms of speed?  As far as I know, Xilinx has the only
> electrically reprogrammable chips.  This is a *really nice* feature.
> I get somewhat paranoid about programming a "burn-once" part that costs
> more than a few bucks.
> 
> Hope to start some discussion (with light, without too much heat)...
> 
> --Neil McKenzie (mckenzie@june.cs.washington.edu)

I've used the AMD (or Xilinx) LCAs quite a bit recently.  I chose to use the
AMD (Advanced Micro Devices) support software due to the larger size of 
company and better user support.  Due to a cross license expiration AMD and
Xilinx will begin to go separate directions in support.  My "personal"
feeling is that AMD will provide better support in the long run.

As far as programming for max. speed I've found that APR will do a fairly
good job of placing the blocks if given a very small ending temperature,
but it certainly cannot do a good job of routing nets.  Using a constraint
file will help some, but still expect to spend some time "tweeking" the
layout.  Most of my experience is in the 2000 series parts.  I basically 
enter my state machine design by hand, let APR run in a loop for about 10
runs choose the best design and trash the others, check my critical nets,
and then look for and cleanup bad routes.  This process may take a while
but you will get the maximum results.

Also both AMD and Xilinx have come out with 100MHz versions of their parts.

I have no affilation with AMD or Xilinx.  This information is derived from
my own use of their components and support.

Just another happy, but tired EE.
Brad Barmore
Tektronix, Inc.