Path: utzoo!utgpu!watmath!att!ucbvax!amdcad!rpw3 From: rpw3@amdcad.AMD.COM (Rob Warnock) Newsgroups: sci.electronics Subject: Re: Xilinx Message-ID: <26658@amdcad.AMD.COM> Date: 8 Aug 89 06:17:46 GMT References: <8897@june.cs.washington.edu> <21040@cup.portal.com> <1989Aug5.224902.4724@utzoo.uucp> Reply-To: rpw3@amdcad.UUCP (Rob Warnock) Organization: [Consultant] San Mateo, CA Lines: 28 In article <1989Aug5.224902.4724@utzoo.uucp> Henry Spencer writes: +--------------- | >The problem with this part is that to design with it you need at least | >6 Meg of memory in your pc, and the pc must be a fast '386 type or it | >is frustatingly slow... | Well, the *problem* with this part, and with a number of other programmable- | logic devices for that matter, is that the algorithm for converting circuit | to programming bits is secret. The software would improve if it had some | competition. +--------------- And that's not likely to happen soon, since Xylinks is probably making almost as much off the software as they are off the parts! (...at least until all the users who are prototyping them in now in onesy-twosies now go into full production with their products.) Of course, if you have access to a copy of the software, and *LOTS* of time, I guess you could always try to reverse-engineer the pattern, by taking the "diff" of the bitstreams for pairs of designs which differ by one "bit" (or gate, whatever). But don't hold your breath... ;-} ;-} Rob Warnock Systems Architecture Consultant UUCP: {amdcad,fortune,sun}!redwood!rpw3 DDD: (415)572-2607 USPS: 627 26th Ave, San Mateo, CA 94403