Path: utzoo!attcan!uunet!cs.utexas.edu!csd4.milw.wisc.edu!uakari.primate.wisc.edu!indri!ames!vsi1!wyse!mips!keith From: keith@mips.COM (Keith Garrett) Newsgroups: comp.arch Subject: Re: Vector Machines? Message-ID: <25141@obiwan.mips.COM> Date: 10 Aug 89 17:01:31 GMT References: <112400001@uxa.cso.uiuc.edu> <43974@bbn.COM> Reply-To: keith@mips.COM (Keith Garrett) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 17 In article <43974@bbn.COM> slackey@BBN.COM (Stan Lackey) writes: >In article <112400001@uxa.cso.uiuc.edu> gsg0384@uxa.cso.uiuc.edu writes: >>I am curious about vector registers. [question about vector register cost] >>Q2. With what processors is it possible to implement vector architecture? > >Ardent used a customized version of one of the MIPSco chips for a >similar purpose. If you can get it, this may be a good starting >point. Or you could just buy an Ardent, I guess. Or any other >mini-super, depending upon you needs. > Ardent uses off-the-shelf r2000 processors, and adds their own floating-point vector co-prrocessor and graphics processor. -- Keith Garrett "This is *MY* opinion, OBVIOUSLY" UUCP: keith@mips.com or {ames,decwrl,prls}!mips!keith USPS: Mips Computer Systems,930 Arques Ave,Sunnyvale,Ca. 94086