Path: utzoo!utgpu!jarvis.csri.toronto.edu!eecg.toronto.edu!tak Newsgroups: comp.arch From: tak@eecg.toronto.edu (Mike Takefman) Subject: Re: hardware complex arithmetic support Message-ID: <1989Aug16.152519.3744@jarvis.csri.toronto.edu> Organization: EECG, University of Toronto References: <1672@crdgw1.crd.ge.com> <1502@l.cc.purdue.edu> Date: 16 Aug 89 19:25:19 GMT > In article jk3k+@andrew.cmu.edu (Joe Keane) writes: > Are there any architectures that have hardware support for complex arithmetic? > For example, dividing two complex numbers (in rectangular form) takes 6 > multiplications, 2 divisions, and 3 add/subtracts, if i count correctly. With > appropriate functional units that can be hooked up in the right way, this could > be done in a couple of clock cycles. The TASP (teamed array signal processor i think) from motorola information systems (toronto I think) has complex floating point pipelines. The box is used by the military for radar work. -- Michael Takefman "I'll have whatever she ordered!" University of Toronto When Harry Met Sally E.E. Computer Group tak@eecg.toronto.edu