Path: utzoo!utgpu!watmath!uunet!mcvax!unido!sbsvax!roeder From: roeder@sbsvax.UUCP (Edgar Roeder) Newsgroups: gnu.gcc Subject: constraints for inline asm (mc680x0), HELP!!! Keywords: asm, constraints, subroutine like statements, inline code Message-ID: <834@sbsvax.UUCP> Date: 14 Aug 89 15:03:43 GMT Organization: Universitaet des Saarlandes, Saarbruecken, W-Germany Lines: 39 Hello ! I have a problem with constraints in inline assembler code. I would like to tell gcc that a statement like asm("trap #0"); has as side effect that register d0 holds a 'return value' after executing the statement. If i use such a statement in a function foo which is then called as ret = foo(); the compiler will assign the value of register d0 to ret. But when i try to make foo an inlined function, the gcc compiler doesn't know about d0 holding a 'return value'. I have already tried to use globbered register constraints but did not get the desired effect. I have also tried the following statements: inline int foo() { int ret; asm("trap #0"); asm volatile ("movel d0, %0" : /* no input */ : "=g" (ret)); return ret; } This way i get sometimes code like "movel d0,d0". But by using inline code i wanted to get faster and smaller code. Has someone out there a better (official ?) method of telling the compiler about such side effects ? Is the use of return values in a special register after function calls hard-coded into gcc ? Could i specify, that my 'return value' is actually in another register (for example a3) ? Another topic. Consider the following sequence (called in supervisor mode): asm("movel sp,%0" : : "=a" (supervisor_stack)); asm("andiw #0xDFFF,sr); /* go into user mode */ asm("movel sp,%0" : : "=a" (user_stack)); Can i tell gcc, that the second reference to sp is actually to a different register (thus preventing the compiler from optimizing here) ? I know about volatile and that i could rearrange the statements and get the same effect. I only want to know wether i can tell the compiler about such things in the constraints. - Edgar