Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!cica!tut.cis.ohio-state.edu!gem.mps.ohio-state.edu!ginosko!uunet!seismo!esosun!cogen!celerity!celit!hutch
From: hutch@celerity.uucp (Jim Hutchison)
Newsgroups: comp.arch
Subject: Re: cache speed
Keywords: cache
Message-ID: <567@celit.UUCP>
Date: 22 Aug 89 21:57:27 GMT
References: <3941@phri.UUCP>
Reply-To: hutch@celerity.UUCP (Jim Hutchison)
Organization: FPS Computing
Lines: 15

>Roy Smith, Public Health Research Institute, writes:
>	Cache is, by definition, a compromise.  If you really want to build
>a "no compromise" machine, make the entire main memory out of SRAM fast
>enough to keep up with the CPU.

Yes, Cache is a compromise.  Mainly to your wallet and the speed of light.
Electrons, as you know, take time to negotiate their way down a length of
wire.  So with that in mind, some memory will (probably) always be faster
to use than other memory.  As soon as you leave the board, you have to deal
with a bus or a long i/o path.  As soon as you leave the cabinet...  You get
the picture (atleast how I see it).  Its a compromise you can't really avoid,
if you want to have a lot of memory.

/*    Jim Hutchison   		{dcdwest,ucbvax}!ucsd!celerity!hutch  */
/*    Disclaimer:  I am not an official spokesman for FPS computing   */