Path: utzoo!attcan!uunet!mcsun!cernvax!hjm
From: hjm@cernvax.UUCP (Hubert Matthews)
Newsgroups: comp.arch
Subject: Re: more Observability
Message-ID: <1063@cernvax.UUCP>
Date: 24 Aug 89 15:20:28 GMT
References: <5945@pt.cs.cmu.edu> <21547@cup.portal.com>
Reply-To: hjm@cernvax.UUCP (Hubert Matthews)
Organization: CERN European Laboratory for Particle Physics, CH-1211 Geneva, Switzerland
Lines: 17


Read-Modify-Write cycles can be really nasty.  I cannot remember which
particular PDP-11 stuff it was, but one of the character I/O devices
had the read and the write port at the same address; read the address
and you get the next input character, write it and that character goes
down someone's line.  This is fine until someone changes the spec. for
the CPU so that the microcode always did RMW cycles.  "Why do I lose
an input character whenever I do a write?".  This took a long time to
find, and a lot of cash to solve (buy completely new peripherals, ugh).

So, please, no more write-only registers or similar gate saving tricks.


-- 
Hubert Matthews      ...helping make the world a quote-free zone...

hjm@cernvax.cern.ch   hjm@vxomeg.decnet.cern.ch    ...!mcvax!cernvax!hjm