Path: utzoo!attcan!uunet!mcsun!hp4nl!philapd!ssp1!dolf
From: dolf@idca.tds.PHILIPS.nl (Dolf Grunbauer)
Newsgroups: comp.arch
Subject: Re: more Observability
Summary: more of these instructions
Message-ID: <229@ssp1.idca.tds.philips.nl>
Date: 25 Aug 89 06:21:57 GMT
References: <5945@pt.cs.cmu.edu> <21547@cup.portal.com>
Organization: Philips Telecommunication and Data Systems, The Netherlands
Lines: 21

In article <21547@cup.portal.com> mmm@cup.portal.com (Mark Robert Thorson) writes:
>Then he had written some more advanced code to support a decent demo program.
>That code didn't work at all.  He finally localized the bug to an XOR
>instruction being used to actually perform the write to the frame buffer.
>It seemed as though XOR didn't work.

I once had the same experience. I had to clear the interrupt level for some
disk controller. As this particular operating system (called ERM System)
was written in C, I used the quite normal C expression:
     cntrl->int_lvl = 0;
which was compiled (for a MC68008, :-) to the instruction:
     clr.b  0xF(a4)
which seems quite normal. The register however was write only. Somehow I
continuously kept on having bus errors for this one. I did expect that a CLR
instruction writes a 0, but after having read the small print, I discovered
that the CLR was implemented as an XOR (i.e. read-modify-write).

-- 
Dolf Grunbauer          Tel: +31 55 432764  Internet dolf@idca.tds.philips.nl
Philips Telecommunication and Data Systems  UUCP ....!mcvax!philapd!dolf
Dept. SSP, P.O. Box 245, 7300 AE Apeldoorn, The Netherlands