Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!xanth!ginosko!uunet!yale!omtzigt-theo
From: omtzigt-theo@CS.Yale.EDU (Theo Omtzigt)
Newsgroups: comp.arch
Subject: PCB technology parameters wanted
Message-ID: <70809@yale-celray.yale.UUCP>
Date: 27 Aug 89 19:47:30 GMT
Sender: root@yale.UUCP
Reply-To: omtzigt-theo@CS.Yale.EDU (Theo Omtzigt)
Organization: Yale University Computer Science Dept, New Haven CT  06520-2158
Lines: 26


 Having to design (academically) systems comprised of chips, PCBs and
cabinets, I am interested in the physics of these technologies.
Does anybody know the answers on the following questions:

1- What is a typical load a chip buffer has to drive assuming the
   signal stays on the PCB?

2- What is a typical load a buffer has to drive if the signal goes
   off the PCB, onto a multilevel backplane?

3- What is a typical wire width of PCBs and backplanes?

4- What is the typical capacitance/resistance/inductance of a line
   of current PCB technology?

5- What is the typical capacitance/resistance/inductance of a line 
   of current backplane technology?

6- What is the material they use on PCBs and backplanes, copper,
   aluminum, or some fancy composite?

Thanks in advance,

Theo Omtzigt
omtzigt-theo@cs.yale.edu