Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ames!sun-barr!newstop!sun!sunshade!rajivp
From: rajivp@sunshade.Sun.COM (Rajiv Patel)
Newsgroups: comp.arch
Subject: Re: Instruction (dis)continuation
Message-ID: <123909@sun.Eng.Sun.COM>
Date: 29 Aug 89 17:45:03 GMT
References: <AGLEW.89Aug21205533@chant.urbana.mcd.mot.com> <1989Aug24.215104.156@mentor.com> <231@ssp1.idca.tds.philips.nl> <2345@oakhill.UUCP> <204@bbxeng.UUCP> <5990@pt.cs.cmu.edu> <26418@winchester.mips.COM>
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Reply-To: rajivp@sun.UUCP (Rajiv Patel)
Organization: Sun Microsystems, Mountain View
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In article <26418@winchester.mips.COM> mash@mips.COM (John Mashey) writes:
>	The more fundamental issue is how much state does it take
				      ^^^^^^^^^^^^^^^^^^^^^^^^^^^
>	to figure out where you were and get back there.  At the
        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>	minimum, this is just a PC.  At worst, the processor dumps at
>	lot of mysterious stuff somewhere.
>-- 
>-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>

  To further the discussion on this issue ....

  There has been lots of discussion about superscalar and VLIW architectures.
  How about instruction continuation and/or restart for these architectures.
  It seems that a N way super-scalar machine would need N PC's and a lot of
  state information. For VLIW machines it seems that instruction continuation
  might be better for restart might first need to roll back partially completed
  operations. 


 Rajiv Patel.