Path: utzoo!utgpu!watmath!att!dptg!rutgers!cs.utexas.edu!uunet!yale!leichter
From: leichter@CS.YALE.EDU (Jerry Leichter)
Newsgroups: comp.arch
Subject: Re: Memory utilization & inter-process contention
Message-ID: <71150@yale-celray.yale.UUCP>
Date: 30 Aug 89 21:59:33 GMT
Sender: root@yale.UUCP
Organization: Yale Computer Science Department, New Haven, Connecticut, USA
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X-from: leichter@CS.YALE.EDU (Jerry Leichter (LEICHTER-JERRY@CS.YALE.EDU))

By an interesting coincidence, I received the following message - pointing to
a study behind the VAX and VMS paging architecture - just yesterday, quite
independently of this ongoing discussion:

	In the 1981 Journal of the ACM (0-89791-051-6 /81/0009/0048) Rollins
	Turner and Hank Levy published an article comparing the original
	segmented FIFO VMS mem. mgt. system to a pure Least Recently Used
	(LRU) methodology. In it, they show that the fault behavior of the VMS
	modified FIFO approaches arbitrarily close to that of pure LRU as the
	size of the secondary caches (free and modified lists) is increased.

Note that a JACM article would probably be pretty theoretical in nature.

							-- Jerry