Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uflorida!haven!adm!smoke!gwyn
From: gwyn@smoke.BRL.MIL (Doug Gwyn)
Newsgroups: comp.lang.c
Subject: Re: Varargs problem
Message-ID: <10892@smoke.BRL.MIL>
Date: 31 Aug 89 22:34:25 GMT
References: <4YxPuc200VsnE_B3Jy@andrew.cmu.edu> <1301@levels.sait.edu.au> <10863@smoke.BRL.MIL> <24FC0BD3.4529@marob.masa.com>
Reply-To: gwyn@brl.arpa (Doug Gwyn)
Organization: Ballistic Research Lab (BRL), APG, MD.
Lines: 13

In article <24FC0BD3.4529@marob.masa.com> cowan@marob.masa.com (John Cowan) writes:
>I realize I may be starting a flame war here, but what is supposed to count
>as a "true" segmented architecture?  I immediately concede that the 8086 doesn't
>have such a thing, but I contend that the 80286 running in protected mode does.
>It has segment tables, segment length control, etc. etc.

What I had in mind was a Burroughs 6700-like architecture with all data
accesses implied as offsets from the relevant segment base.  I can
imagine needing more bits for code switch to another segment than for
data access switch between segments.  I don't know if any machines have
been built that actually are like that, but since code and data are
treated entirely separately on some existing machines, it is not entirely
out of the question.