Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!ANDREW.CMU.EDU!bh1e+ From: bh1e+@ANDREW.CMU.EDU (Brendan Gallagher Hoar) Newsgroups: comp.sys.apple Subject: Re: GS--running from ROM is faster Message-ID: <8YyJ4KW00WB3Q7MFhy@andrew.cmu.edu> Date: 28 Aug 89 14:49:58 GMT Sender: daemon@ucbvax.BERKELEY.EDU Organization: The Internet Lines: 23 Brian, you say that 10MHz 65C802s are EASILY available. Aren't 65C816s and 65C802 almost EXACTLY the same internally? If so, why is it that 10MHz 65C816s aren't readily available? I guess one possible answer to that is that fewer people are looking for the 65C802s...but then, who's buying up all the 10MHz 65C816s? AE is still just using the 6 and 7 MHz versions... Hmmm...I have also have a question about how the imporvements on newer 16 and 32 bit versions of the 65 series will work, if they ever come into existance. Will WDC ever change the clock cycles that a basic 65XXX chip in 6502 emul mode will take to do an instruction? If not (I can see a lot of arguments against it), will they remeain the same in emul mode, but possibly be improved in native mode using the same instruction? Also, since most of the one byte instructions are used up, how are new instructions going to work? Will WDC use a two byte system, or will they create a whole new set of one (and possibly two) byte instructions when in native mode? Thanks! Brendan