Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.csd.uwm.edu!gem.mps.ohio-state.edu!ginosko!uunet!microsoft!brianw From: brianw@microsoft.UUCP (Brian Willoughby) Newsgroups: comp.sys.apple Subject: Re: GS--running from ROM is faster Message-ID: <7555@microsoft.UUCP> Date: 29 Aug 89 23:42:21 GMT References: <8YyJ4KW00WB3Q7MFhy@andrew.cmu.edu> Reply-To: brianw@microsoft.UUCP (Brian Willoughby) Organization: Microsoft Corp., Redmond WA Lines: 64 In article <8YyJ4KW00WB3Q7MFhy@andrew.cmu.edu> bh1e+@ANDREW.CMU.EDU (Brendan Gallagher Hoar) writes: >Brian, you say that 10MHz 65C802s are EASILY available. Aren't 65C816s and >65C802 almost EXACTLY the same internally? If so, why is it that 10MHz >65C816s aren't readily available? > >I guess one possible answer to that is that fewer people are looking for >the 65C802s...but then, who's buying up all the 10MHz 65C816s? You answered your own question, at least partially. Regarding who is buying 65C8xx's, I just asked Western Design myself when I ordered the 10 MHz 65C802. Their response was that the 65C816, and several of their other 6502 spinoffs, all CMOS, are used in biomedical applications because of the low power CMOS, and also in embedded controllers and communications devices. I wish she had gone into more detail. She promised to send more info, and I recieved a wad of data on several juicy stand-alone 6502 supersets, complete with built-in serial ports, parallel ports, RAM and ROM. But, alas, no list of company names who use W65C8xx's. >AE is still just using the 6 and 7 MHz versions... I wish AE would at least come out with a 65C816 TransWarp for the Apple II Plus - sort of a mix of their 65816 option for thier memory expansion card and the accelerator. 7 MHz or so would be fine, especially considering high speed DRAM prices (or the alternative - cache RAM - which is also expensive once you get the whole cache system set up). >Hmmm...I have also have a question about how the imporvements on newer 16 and >32 bit versions of the 65 series will work, if they ever come into existance. >Will WDC ever change the clock cycles that a basic 65XXX chip in 6502 >emul mode will take to do an instruction? If not (I can see a lot of arguments >against it), will they remeain the same in emul mode, but possibly be improved >in native mode using the same instruction? My guess is that WDC will not change the 6502 Emulation mode. They have already gone to great pains to make a step "backward" in compatibility when compared to the 65C02. This is regarding the RDY input to the 6502, where the W65C802 is more 6502 compatible than the 65C02. I think they have good reasons for this. Probably that the companies mentioned above need exact 6502 emulation to boot WDC's newer processors on their existing boards. The 6502 and its spinoffs are fairly popular. I interviewed for a job in NC doing 6502 programming for a security safe that had a 6502 based computer inside. The safe was intended for important documents, and would mark the contents with traceable dye if the allotted time to reach the bank deposit from the company site expired (i.e. if someone stole it and left town). >Also, since most of the one byte instructions are used up, how are new >instructions going to work? Will WDC use a two byte system, or will they >create a whole new set of one (and possibly two) byte instructions when in >native mode? Your guess is as good as mine, perhaps there will be two modes with 255 new single byte opcodes when in the 32 bit mode. If they do use 2 byte opcodes, though, I would like to see improved code prefetching. >Thanks! >Brendan Brian Willoughby UUCP: ...!{tikal, sun, uunet, elwood}!microsoft!brianw InterNet: microsoft!brianw@uunet.UU.NET or: microsoft!brianw@Sun.COM Bitnet brianw@microsoft.UUCP