Path: utzoo!attcan!utgpu!watmath!att!dptg!rutgers!cs.utexas.edu!oakhill!davet
From: davet@oakhill.UUCP (David Trissel)
Newsgroups: comp.sys.m68k
Subject: Re: Enclosed: One new opcode for your 68020 system!
Message-ID: <2363@oakhill.UUCP>
Date: 31 Aug 89 05:21:22 GMT
References: <7784@cbmvax.UUCP>
Reply-To: davet@oakhill.UUCP (David Trissel)
Organization: Motorola Inc., Austin, Texas
Lines: 34

In article <7784@cbmvax.UUCP> bryce@cbmvax.UUCP (Bryce Nesbitt) writes:
>
>Number three on my "wish list" of 680XX opcodes is:
>
>		tst.l	a0
>
>As we all know, this instruction is documented as illegal in all Motorola
>documentation.  68000 processors take an illegal exception.  The 68020
>and 68030, however will properly execute tst.l a0 (!).

Actually this addressing mode IS documented in the MC68020 and MC68030 manuals
but so pathetically bad that it is misread by almost all readers (initially
including myself.)

Note the following which appears above the supposed table of valid effective
addresses for TST and pay attention to what I've underlined:

---------------
  Effective Address field - Specifies the destination operand. If the
     operation size is word or long, all addressing modes are allowed. If the
                                     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
     operation size is byte, only data addressing modes are allowed as
     shown:

      [Table appears here with dashes indicating no An and #<data> modes]
----------------

In fact, I wouldn't be a bit surprized if the table is STILL wrong and that a
tst.b will work with immediate data.

A lot of people besides myself have bitched about this misguiding documentation
but those in charge of it don't seem to care.

 -- Dave Trissel  Motorola Austin