Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!rutgers!usc!basil.usc.edu!blarson From: blarson@basil.usc.edu (bob larson) Newsgroups: comp.arch Subject: Re: Instruction (dis)continuation (long) Message-ID: <19677@usc.edu> Date: 3 Sep 89 20:01:00 GMT References: <1989Aug24.215104.156@mentor.com> <231@ssp1.idca.tds.philips.nl> <2345@oakhill.UUCP> <204@bbxeng.UUCP> <2353@oakhill.UUCP> Sender: news@usc.edu Reply-To: blarson@basil.usc.edu (bob larson) Organization: USC AIS, Los Angeles Lines: 15 In article <2353@oakhill.UUCP> shebanow@oakhill.UUCP (Mike Shebanow) writes: >I believe (but I am willing to be proved wrong) that anything that can >be done using instruction continuation can also be done using restart. Since instruction continuation requires the ability to save and restore internal state information, this could be (ab)used in various ways. The only reasonable one I can think of is for chip testing. (For both design and manufacuring defects.) See the periodicly repeating discussion of testabilty on sci.electrionics. -- Bob Larson Arpa: blarson@basil.usc.edu Uucp: {uunet,cit-vax}!usc!basil!blarson Prime mailing list: info-prime-request%ais1@usc.edu usc!ais1!info-prime-request