Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!ulowell!masscomp!dennis From: dennis@masscomp.UUCP (Dennis Rockwell) Newsgroups: comp.arch Subject: Re: Instruction (dis)continuation Summary: PDP-11 register change register Keywords: PDP-11 Message-ID: <2812@masscomp.UUCP> Date: 6 Sep 89 13:47:38 GMT References: <1989Aug24.215104.156@mentor.com> <231@ssp1.idca.tds.philips.nl> <2345@oakhill.UUCP> <204@bbxeng.UUCP> <5990@pt.cs.cmu.edu> <205@bbxeng.UUCP> <44908@bbn.COM> Reply-To: dennis@westford.ccur.com (Dennis Rockwell) Organization: CONCURRENT - Westford, Ma Lines: 22 Approved: news In article <44908@bbn.COM> dswartz@BBN.COM (Dan Swartzendruber) writes: > [ ... ] The PDP-11 had >the same problem. I seem to recall they solved it by having a diagnostic >register in which the CPU wrote which registers had been incremented or >decremented and by how much. That wasn't as bad as it might first seem. >There are only two registers which can change as a result of any given >instruction and they could only change by 1, 2 or 4. It's been a while >since I hacked on a PDP-11, so I might be off a little here, but that >was the basic gist.... Some PDP-11s had this register, some did not. It turns out that the only time this was a problem was when an auto-[in|de]crement *floating*point* instruction caused the fault. Unfortunately, DEC left this register out of the PDP-11/60 (or was that the 11/44?), which implemented the standard floating point instruction set. Thus, for this PDP-11 only, you had to do stack probes if you were going to use *(double *)p++ into automatic storage. Dennis Rockwell Concurrent Engineering Westford MA