Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!apple!sun-barr!newstop!sun!sccmts!kum
From: kum@sccmts.Sun.COM (Kumar Venkatasubramaniam)
Newsgroups: comp.arch
Subject: Parity in Internal Data Paths of Processors
Keywords: parity, error detection
Message-ID: <124311@sun.Eng.Sun.COM>
Date: 7 Sep 89 23:44:36 GMT
Sender: news@sun.Eng.Sun.COM
Lines: 20



I am looking for information on the use of parity for error
detection in large systems.  Apart from the obvious use in
detecting errors in memory data and errors in long buses
susceptible to noise, does anyone know of parity being 
carried through the internal paths of a processor?
The major microprocessors (that I know of) available in the
market deal with parity only at the bus interface.  Are
there large systems (mainframes, supercomputers) that 
perform additional parity checks internally and under what
conditions?  Do military and space applications impose any
such requirements?

I would appreciate any information on this subject.


Kumar Venkat
Sun Microsystems
kum@Corp.sun.com