Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.csd.uwm.edu!uxc.cso.uiuc.edu!uxc.cso.uiuc.edu!ux1.cso.uiuc.edu!uxe.cso.uiuc.edu!mcdonald
From: mcdonald@uxe.cso.uiuc.edu
Newsgroups: comp.arch
Subject: Re: SRAM vs. DRAM, 33MHz 386 UNIX-PC
Message-ID: <46500076@uxe.cso.uiuc.edu>
Date: 8 Sep 89 16:29:00 GMT
References: <21936@cup.portal.com>
Lines: 16
Nf-ID: #R:cup.portal.com:21936:uxe.cso.uiuc.edu:46500076:000:728
Nf-From: uxe.cso.uiuc.edu!mcdonald    Sep  8 11:29:00 1989



>Generally, UNIX system do cache flushes when they enter kernel space, and they
>MUST between user tasks, since the address spaces are aliased.  Caching still

I don't understand this. It looks to me that there could be two kinds of
RASM caches: one would cache address in user (or kernel) address space,
before translation of addresses to real physical addresses. These would
need a cache flush, if only for security reasons. 

But, if the cache works on physical addresses, it would seem to me
that it would not need to be flushed. Of course, it would likely have
useless data after a task switch, but would it not that be refreshed
automatically as new stuff was needed? This of course would still take time.

Doug McDonald