Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!cs.utexas.edu!uunet!mcsun!unido!cosmo2!gamber@cosmo.UUCP From: gamber@cosmo.UUCP (Johannes Teich) Newsgroups: comp.lang.forth Subject: Re: The Minimal Forth Machine Message-ID: <3883@cosmo2.UUCP> Date: 10 Sep 89 13:51:57 GMT Sender: news@cosmo2.UUCP Reply-To: gamber@cosmo.UUCP (Johannes Teich) Organization: CosmoNet, D-3000 Hannover 1, FRG Lines: 127 In a message of <11 Aug 89>, Mikael Patel (mikpa@massormetrix.ida.liu.se) writes: > Hi, Forth Lovers, how about a distributed problem solving session? > > The quest is to find `the minimal Forth Machine'. What is the minimal > set of operations such a machine must implement? Five days later, Mikael Patel writes: > After some discussions and help of Mitch Bradley (wmb@Sun.COM) and Peter > da Silva (peter@ficc.uu.net) the Minimal Forth Machine is down to nine > instructions. Three stack instructions may be added when considering > hardware structures as they are implict in the basic set. > > With this tiny set of instructions a Forth environment can be built; > may it be virtual on an other processor or directly in hardware. Hi Mikael, I am sad that I don't fully understand your concept of the Machine. Perhaps you could give some hints? > Some interesting observation are: > > 1. The machine does not have a branch instruction. How can _any_ machine work without a branch instruction? > 2. The machine has only three basic functions. Which functions do you mean? And which are the nine instructions mentioned? I find: "fetch", "drop", "dup", "swap", ">r", "r>", "unary", "1+", "0=", "binary", "nand", "@", "c@", "dup!", "dupc!", "call", "exit". Or do you mean: "ip -> b0,", "b0 -> ma,", "md -> b1,", and so on? > 3. All instructions can be realized so that they only take one > clock cycle. Even memory access! Hmmm... D other difficult stuff skipped \ > Below follows a description of the Machine in a toy hardware language > and Forth definitions for: > > 1. Stack manipulation > 2. Logical operations > 3. Arithmetric operations > 4. Control structures > 5. Some system dependent words > > ( Parameter stack) > 16 bits/word stack rt ( Return stack) > > wr bits/word port ma ( Port for address to memory) > rd/wr bits/word port md ( Port for data to and from memory) Is it possible that there got some text lost? > ( A simple register transfer language) > > fetch ( -- ) > ip -> b0, ( Fetch next instruction) > b0 -> ma, > md -> b1, > b1 -> ir ( Put into decode register) > * ( Execute instruction) > ip + 1 -> ip ( And incremenent instruction pointer) I have some imagination what steps a hardware must execute, but I cannot interpret your instructions. (If ip -> b0, and b0 -> ma, then ma = ip, isn't it?) Do you have a special processor in mind? How is its scheme? D stuff skipped \ > : + ( x y -- z) > begin > dup ( Check if there is still more to do) > while > dup 0< ( Check direction) > if 1+ swap 1- swap ( Decrement and increment) > else > 1- swap 1+ swap ( Increment and decrement) > then > repeat > drop ; ( Drop counter) At least these high-level things are clear. Although ... how about "if", "then", "else", "begin", "while", "repeat", ... ? Where are they defined at compile time? Do you assume a meta compiler? > : sqrt ( x -- x**1/2) > 1 11 0 do ( Newton's method-type algorithm) > over over / + 2/ ( Guess one and divide successive) > loop ( values) > swap drop ; ( Drop temporary value and return) num: 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 23 24 25 34 35 36 48 49 sqrt: 1 2 2 2 2 2 2 3 3 3 3 3 3 3 4 4 5 5 5 6 6 6 7 ^ ^ ^ I tried to run the definitions on my PC. I replaced "begin" by "BEGIN" and ">r" by ">R" and "immediate" by "IMMEDIATE" and so on with my PC/Forth, but I'm still not quite happy. How did you check your routines? > : repeat ( -- ) > swap ( Access block start) > compile (branch) ( Compile a backward branch) > 0= dup r@ @ and ( Fetch branch address and mask) > swap not r> word+ and or >r ; ( Create skip address and select) There evidently some text got lost! :-( If you are willing to give some more information about your very interesting project, I would be glad to study it. Even without your hardware simulation I find it useful to implement a minimal instruction set on a new computer and blow the system up with this tool afterwards. cheers - Johannes +-----------------------------------------------------------------------------+ v Johannes Teich, Hauptmann-Bauer-Weg 16, D-8110 Murnau (FR Germany) v v Phone: 49-8841-1409 (FRG: 08841-1409) v FidoNet: TBUS-BBS 2:507/414.20 v v UUCP via CosmoNet: unido!cosmo!gamber v Zerberus: j*teich@infinet.zer v v Telex via CosmoNet-UK (051) 9312102426 cn g -- 1st_line: "to: cosmo:gamber" v +-----------------------------------------------------------------------------+