Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!rutgers!apple!dlyons From: dlyons@Apple.COM (David Lyons) Newsgroups: comp.sys.apple Subject: Re: Apple 2e doesn't see my 6522's !! Message-ID: <34571@apple.Apple.COM> Date: 7 Sep 89 20:19:29 GMT References: <8909060935.aa25446@SMOKE.BRL.MIL> Organization: Apple Computer Inc, Cupertino, CA Lines: 30 In article <8909060935.aa25446@SMOKE.BRL.MIL> ROBBEL%NKIVXH.SURFNET@HASARA5.BITNET writes: > 2 VIA's and one 74LS138 3-to-8-decoder for address-decoding: > A4 - A5 - A6 connected to input lines, > A7 to first enable (active low), > _________ > IO-SELECT to second enable (active low), > third enable to +5V (active high). > Output 1 of the LS138 is connected to VIA-1, output 2 to VIA-2. > A0 to A3 are connected to R(-egister)S(-elect)0 to RS3 of both VIA's. > As a clock I'm just using Phi-0 (I also tried inverted Phi-1 but that > didn't work either). No patching done to the clock. >The interface should be in the address range $C700 to $C7FF (if I put it in >slot 7; VIA 1 : $C700-$C70F, VIA 2: $C710-$C71F) but there's nothing there !! Sounds pretty reasonable to me. When you say "nothing is there" for $C700-1F, are you getting the same random-ish stuff you get when the card isn't plugged in at all, or something else? You didn't mention the D0-D7 signals, but I assume you've just connected them straight to the VIAs. (I don't have the 6522 specs right in front of me...what are you doing with the clock? Just running it to "clock" inputs on the 6522s?) --Dave Lyons, Apple Computer, Inc. | DAL Systems AppleLink--Apple Edition: DAVE.LYONS | P.O. Box 875 AppleLink--Personal Edition: Dave Lyons | Cupertino, CA 95015-0875 GEnie: D.LYONS2 or DAVE.LYONS CompuServe: 72177,3233 Internet/BITNET: dlyons@apple.com UUCP: ...!ames!apple!dlyons My opinions are my own, not Apple's.