Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!cs.utexas.edu!uunet!peregrine!ccicpg!felix!tgate!ka3ovk!teemc!cfctech!rphroy!tkacik From: tkacik@rphroy.UUCP (Tom Tkacik) Newsgroups: comp.sys.m68k Subject: Re: Enclosed: One new opcode for your 68020 system! Message-ID: <16084@rphroy.UUCP> Date: 30 Aug 89 21:53:38 GMT References: <7784@cbmvax.UUCP> Reply-To: tkacik@rphroy.UUCP (Tom Tkacik) Organization: GM Research Labs, Warren, MI Lines: 30 In article <7784@cbmvax.UUCP> bryce@cbmvax.UUCP (Bryce Nesbitt) writes: > >Number three on my "wish list" of 680XX opcodes is: > > tst.l a0 > >As we all know, this instruction is documented as illegal in all Motorola >documentation. 68000 processors take an illegal exception. The 68020 >and 68030, however will properly execute tst.l a0 (!). Wrong! As most of us know :-), this is documented as legal in the 68020 and 68030 Motorola documentation. For the 68000, the manual states: Effective Address field - Specifies the destination operand. Only data alterable addressing modes are allowed as shown: For the 68020 and 68030, it states: Effective Address field - Specified the destination operand. If the operation size is word or long, all addressing modes are allowed. If the operation size is byte, only data addressing modes are allowed as shown: As you can see tst.w a0 will also work. -- --- Tom Tkacik GM Research Labs, Warren MI 48090 uunet!edsews!rphroy!megatron!tkacik "If you can't stand the bugs, stay out of the roach-motel." Ron Guilmette