Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!gem.mps.ohio-state.edu!apple!vsi1!wyse!stevew From: stevew@wyse.wyse.com (Steve Wilson xttemp dept303) Newsgroups: comp.arch Subject: Re: Instruction (dis)continuation ( Message-ID: <2425@wyse.wyse.com> Date: 15 Sep 89 15:46:22 GMT References: <2353@oakhill.UUCP> <261500010@S34.Prime.COM> <34701@apple.Apple.COM> <642@unicads.UUCP> Sender: news@wyse.wyse.com Reply-To: stevew@wyse.UUCP (Steve Wilson xttemp dept303) Organization: Wyse Technology Lines: 18 In article <642@unicads.UUCP> les@unicads.UUCP (Les Milash) writes: >i'll summarize (and i'm sure y'all will correct me if i'm wrong:-) >memory mapped i/o has to be "memory-like" since processors will often assume >that stuff in the "memory space" is memory-like, even to the point of calling >its "memory space" virtual and translating to physical. > The definition I've always heard/used for memory-mapped I/O was one which implied that all control to the device was done via memory addresses, i.e. not using any special I/O instructions such as in/out on the 80x6 line. Therefore, any I/O device that is hooked up to a micro such as a 68K would by definition have to be "memory-mapped" since the 68K doesn't have provisions for in/out instructions. The device will react to the decode of some specific address range presented by the processor. I've never heard of said device being "memory-like" as being part of the definition of this term. Steve Wilson