Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!aplcen!ginosko!uunet!ncrlnk!ncr-sd!crash!simpact!kquick
From: kquick@simpact.com (Kevin Quick, Simpact Assoc., Inc.)
Newsgroups: comp.arch
Subject: Re: Instruction (dis)continuation (
Message-ID: <545@simpact.com>
Date: 15 Sep 89 17:00:37 GMT
References: <2353@oakhill.UUCP> <261500010@S34.Prime.COM> <34701@apple.Apple.COM> <642@unicads.UUCP> <1516@atanasoff.cs.iastate.edu>
Organization: Simpact Associates, San Diego CA
Lines: 54

In article <1516@atanasoff.cs.iastate.edu>, hascall@atanasoff.cs.iastate.edu
(John Hascall) writes:
>     Examples using the VAX instruction set (write operands are rightmost):
>
>          MOVW   IO_DEV_CSR,R0         ; no problem: no page faults in I/O space
> 				      ;  (even if MOVW was a restarted instr)
> 	 SUBW3  IO_DEV_CSR,(R2)+,R3   ; no problem: SUBW3 is continued
>          SUBW3  IO_DEV_CSR,@(R2)+,R3  ; trouble: @(R2)+ can cause page fault
> 	 SUBW3  @(R2)+,IO_DEV_CSR,R3  ; can you get away with this because the
> 				      ; I/O operand is read last??
>
>     I just can't see where you would use such wierd instructions in a
>     device driver when accessing memory-mapped I/O registers (even in a
>     multiple-memory-accesses-per-instruction machine like the VAX).
>
> John Hascall
> Systems Group
> ISU Comp Center

The above instruction examples do show the possible problems involved in
restarting vs continuing instructions when accessing device registers, but
the third and fourth instructions above are usually protected (under VAX/VMS)
in another fashion, namely the Interrupt Priority Level (IPL).

On the VAX machine, setting the IPL to a value between 0 and 31 in the
processor register will block all interrupts occurring at the current IPL
setting or lower until the IPL setting is lowered to the value at which the
interrupt may be delivered.

The importance of this is the VAX/VMS programming convention (read law, since
if you break it, bad things are very likely to happen to you) is that you must
be set to IPL 20 or higher to touch device registers (memory-mapped locations).
In relating this to the third and fourth instructions presented by Mr. Hascall,
it is observed that a VAX/VMS page fault will occur at IPL 2, and is therefore
prevented when accessing device registers at IPL 20.  If Mr. Hascall's example
above did actually generate a page fault, the machine would generate an
invalid exception and a bugcheck ---> crashdump analysis and reboot time.
(VAX/VMS drivers typically operate with system non-paged memory at high IPLs).

As a final note with regards to this discussion, it is the general practice
of device drivers on VAX/VMS to access device registers at IPL 20 or above,
but to perform most of their processing at a lower IPL (typically 8).  Thus,
a driver wishing to read a device register as above would raise the IPL to 20,
read the device register into an unused register, and then return to IPL 8
to continue processing, i.e. the device register is touched ONCE for the
entire process, and it is the driver's responsibility not to lose the value
obtained, since it probably cannot be reread from the device.

My apologies if this seems overly pedantic or is more machine specific than
this discussion/forum warrants, but I wanted to shed some light on one this
aspect of the restarted vs. continued instruction discussion.

	-- Kevin Quick,  Simpact Associates, Inc.,  San Diego, CA.
	   Internet: simpact!kquick@crash.cts.com