Path: utzoo!mnetor!tmsoft!torsqnt!jarvis.csri.toronto.edu!rutgers!gatech!mcnc!decvax!ima!esegue!compilers-sender From: preston@titan.rice.edu (Preston Briggs) Newsgroups: comp.compilers Subject: use-def chains Message-ID: <1989Sep19.050839.1255@esegue.segue.boston.ma.us> Date: 19 Sep 89 05:08:39 GMT Sender: compilers-sender@esegue.segue.boston.ma.us Reply-To: Preston Briggs Organization: Compilers Central Lines: 26 Approved: compilers@esegue.segue.boston.ma.us Howdy, I'm curious about how many people actually build use-def chains for optimization. (That is, for each variable reference, a list of all the instructions that might have set the variable. Alternatively, def-use chains link a definition with all the uses.) They are mentioned often in the literature, but seem expensive in time and space to build. On the other hand, Wegman and Zadeck (and others) have been playing with a form called Static Single Assignment (SSA) which seems reasonably space efficient. They also have methods to construct the form quickly, at least for reducible flow graphs. So, any experience out there? I'm especially interested in space-efficient representations (think BIG fortran routines), so ideas for compact representation are welcome too. Thanks, Preston Briggs preston@titan.rice.edu -- Send compilers articles to compilers@ima.isc.com or, perhaps, Levine@YALE.EDU { decvax | harvard | yale | bbn }!ima. Meta-mail to ima!compilers-request. Please send responses to the author of the message, not the poster.