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From: yodaiken@freal.cs.umass.edu (victor yodaiken)
Newsgroups: comp.arch
Subject: Asynchronous cpu
Message-ID: <5241@dime.cs.umass.edu>
Date: 4 Oct 89 04:00:37 GMT
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Reply-To: yodaiken@freal.cs.umass.edu (victor yodaiken)
Organization: University of Massachusetts, Amherst
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In the June 89 SIGARCH there's an article by Martin, Burns and a couple
of other folks from CALTECH on using the self-timed (asynchronous) 
circuits that they've been pushing at CALTECH to build a processor. 
The paper and chip look interesting, but there's a lack of details.
Any comments on this work out there? Any comments on self-timed
circuits themselves?