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From: lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay)
Newsgroups: comp.arch
Subject: Micro 2000
Summary: science fiction from the horse's mouth
Message-ID: <6415@pt.cs.cmu.edu>
Date: 4 Oct 89 20:15:56 GMT
Organization: Carnegie-Mellon University, CS/RI
Lines: 35

The October IEEE Spectrum has an interesting article called
"Microprocessors circa 2000". It seems to be a semiofficial statement
from Intel, and it's optimistic about the coming decade.

Specifically, the hot chip they expect (the "Micro 2000") is:

250 MHz
0.1 micron minimum device geometries
one square inch
3.3 or 2.5 V power supply
"innovative refrigeration techniques may be needed"
50-100 million transistors, budgeted as follows:
	4 CPUs @ 4M each 
	2 vector units @ 4M each
	graphics unit, 4M
	bus interface, 2M
	self test, 3M
	shared cache, 2MB
Each vector unit delivers 4 results/clock.
Each CPU does 3 instructions/clock.
They made no comment about logic families, except that the word
"silicon" did escape their lips.
----------------------------

It is rumored that multiple-CPU chips really are in the works, and
for 1991, not for 2000.  (No, I don't mean university projects, or
published designs such as TRAC.)

If they are going to happen, what would people like to see?  How
should the units communicate?  What about internal vs external
interrupts; MMU[s]; local caches; semaphores; hardware forks?  
Any shared-register fans out there?

-- 
Don		D.C.Lindsay 	Carnegie Mellon Computer Science